Intel’s 2026 roadmap is unlike any the company has published in recent years, because its manufacturing ambitions and its product launches have to succeed simultaneously.
Panther Lake, the Core Ultra Series 3 laptop processor unveiled at CES in January, is the first consumer chip built on Intel 18A — the company’s new process node combining RibbonFET GAA transistors with PowerVia backside power delivery. Clearwater Forest, the next-generation Xeon E-core server CPU formally introduced March 3 at MWC 2026, is the server counterpart to it, and both are proof points for a foundry business that Intel has publicly stated could not justify proceeding to its next node, 14A, without first securing a major external customer.
Meanwhile, Intel is currently shipping the AI data center chip Gaudi 3, which has been available through cloud partners since late 2024. The chip was supposed to be followed by Falcon Shores, but Intel cancelled it for commercial release and confirmed it would deploy the chip internally instead, redirecting its GPU roadmap toward inference workloads. That produced Crescent Island, an inference-focused data center GPU which is expected to enter customer testing in the second half of 2026, with a potential successor in ‘Jaguar Shores’, due 2027.
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Meteor Lake to Nova Lake
Since 2023, Intel’s consumer CPU roadmap has focused on architectural consolidation, including the abandonment of the monolithic die. Meteor Lake, which launched in December 2023 as the first Core Ultra series processor, moved Intel’s consumer laptop chips onto Intel 4 with Foveros 3D packaging, splitting compute, graphics, SoC, and I/O functions across separate tiles connected via hybrid bonding. That was an inflection point, with every subsequent generation iterating on that foundation rather than departing from it.
Then came Lunar Lake, the Core Ultra 200V series that launched in September 2024, which Intel hailed as its most power-efficient x86 platform, targeting the Copilot+ PC category with a fourth-generation NPU and the debut of the Xe2 graphics architecture. Arrow Lake followed in October 2024 as the desktop counterpart under the Core Ultra 200S branding.
While both share the multi-tile approach, they diverge at the process level. Arrow Lake consumer parts don’t use Intel 20A; Intel publicly confirmed the decision to use external nodes instead — almost certainly from TSMC — for the consumer desktop line. Intel originally said that 20A would be the node that would introduce RibbonFET and PowerVia, but the company moved those technologies to 18A instead and treated 20A as a stepping stone it bypassed for production.
|
Platform |
Availability |
Process / Packaging |
AI |
|
Core Ultra Series 1 (Meteor Lake) |
December 2023 |
Intel 4 / Foveros 3D |
First “AI PC” generation; NPU debut |
|
Core Ultra 200V (Lunar Lake) |
September 2024 |
External / SoC Integration |
4th-gen NPU; Copilot |
|
Core Ultra 200S (Arrow Lake-S) |
October 2024 |
External nodes (TSMC) |
Enthusiast desktop AI |
|
Core Ultra Series 3 (Panther Lake) |
January 2026 |
Intel 18A |
First 18A client; Xe3 IGPU |
|
Nova Lake |
End of 2026 |
Unconfirmed |
Unconfirmed |
Panther Lake, announced at CES in January 2026 as Core Ultra Series 3, is the first client platform built on Intel 18A. Intel cited over 200 system designs in development across laptop partners, alongside a claimed 60% better multi-threaded performance versus Lunar Lake at similar power, and up to 180 total platform TOPS — 120 of which come from the Xe3 integrated GPU and 50 from the NPU 5 architecture. Those figures are Intel estimates tied to specific workloads and comparison generations; the NPU alone meets Microsoft’s 40 TOPS threshold for Copilot+ PC certification, but the 180 TOPS figure reflects all three compute engines combined.
Nova Lake is next, with Intel’s Q4 2025 earnings guidance initially targeting an end-of-2026 launch. This, as we understand, is likely to be delayed to 2027; process node and die configuration details remain unconfirmed, and it’s far too early to speculate given that the upcoming Arrow Lake refresh (Core Ultra 200K Plus) is still to come.
Xeon and data center CPUs
Xeon 6 formalized a split Intel had been building toward for several years: P-core variants targeted at compute-intensive and AI inference workloads, and E-core variants aimed at density, throughput-per-watt, and scale-out workloads like containerized cloud infrastructure.
Sierra Forest launched in June 2024 as the first Intel 3 server product. Its E-core design packs a high thread count into a constrained thermal envelope, making it well-suited for high-density rack deployments. Granite Rapids, the P-core counterpart, followed in September 2024, targeting scientific computing, high-performance databases, and AI inference on large models. Both families share a common platform foundation — a unified I/O die connected via EMIB packaging — which reduces platform churn for OEMs and provides a validation reuse advantage across derivative SKUs.
|
Xeon Family |
Availability |
Core Type |
Process / Packaging |
|
Xeon 6 E-core (Sierra Forest) |
June 2024 |
E-core |
Intel 3 |
|
Xeon 6 P-core (Granite Rapids) |
September 2024 |
P-core |
Intel 3 + EMIB |
|
Xeon 6+ E-core (Clearwater Forest) |
1H 2026 (initial target) |
E-core |
Intel 18A + Foveros Direct 3D / EMIB 3.5D |
|
Diamond Rapids |
2H 2026 or later |
P-core |
Unconfirmed |
Meanwhile, Clearwater Forest, introduced March 3 at MWC 2026, is Intel’s first 18A server CPU. Expected to be released later this year, the chip packs 288 Darkmont E-cores across 12 compute chiplets in its maximum configuration, each with 24 cores all built on 18A. Those compute tiles are stacked on three active base dies fabricated on Intel 3 using Foveros Direct 3D, while two I/O tiles on Intel 7 handle connectivity, and lateral integration across the package is handled by EMIB.
EMIB 3.5D then extends this further by combining those Foveros-stacked modules with Intel’s second-generation EMIB bridges — scaled from 55-micron to 45-micron bump pitch — to link heterogeneous tiles laterally across the package, whether those are identical compute modules or disparate I/O and memory dies. The result is a package whose total silicon area far exceeds what a conventional silicon interposer could accommodate. A clean Clearwater Forest launch would therefore validate both Intel 18A and its advanced packaging simultaneously.
Finally, Diamond Rapids will arrive as an exclusively 16-channel platform after Intel cancelled the 8-channel SKUs that were originally planned for the Xeon 7 lineup. The remaining parts are expected to pack up to 192 P-cores across four compute tiles in an LGA9324 package, with 2nd-generation MRDIMM support pushing memory bandwidth to roughly 1.6 TB/s — nearly double Granite Rapids’ ~844 GB/s. Intel has indicated a 2H 2026 launch window, but has said nothing more solid at this stage.
AI accelerators
Intel’s AI accelerator portfolio hasn’t followed as clean a generational progression as its CPUs have. Gaudi 3, as previously mentioned, is the current shipping product and has been available through cloud partners and direct customers since late 2024, with Intel expanding availability throughout 2025.
Intel has marketed Gaudi 3 around openness and software portability, with the argument being that customers locked into Nvidia’s CUDA ecosystem face procurement and pricing constraints that a chip running on open frameworks like PyTorch and oneAPI can avoid. While this has let the chip find some traction, Gaudi 3 hasn’t achieved a meaningful share in large-scale training clusters where Nvidia’s accelerators still dominate by a huge margin.
|
Platform |
Status |
Target Workload |
|
Gaudi 3 |
Shipping |
Training and inference |
|
Falcon Shores |
Canceled |
N/A |
|
Crescent Island |
Sampling 2H 2026 |
Inference |
|
Jaguar Shores |
Reported only |
Unknown; Post-Crescent Island |
The most concrete successor to Gaudi 3 in the near-term is Crescent Island, which Intel announced as an inference-focused data center GPU in October 2025 at the OCP Global Summit, with customer sampling due to begin in the second half of 2026. The card is built on the Xe3P architecture, a performance-enhanced version of the Xe3 GPU used in Panther Lake, and carries 160 GB of LPDDR5X memory.
That memory choice is a deliberate departure from the HBM stacks used by Nvidia and AMD in their high-end accelerators: Intel is positioning Crescent Island as a power- and cost-optimized part for air-cooled enterprise servers, with Intel CTO Sachin Katti citing “tokens-as-a-service” providers as the primary target. No performance figures have been disclosed.
When and if it does sample later this year, it will be going up against AMD’s Instinct MI450 and Nvidia’s Vera Rubin architecture, both of which use HBM4 and target a broader range of workloads. Crescent Island’s narrower inference focus could make it competitive on cost-per-token, but the 160GB LPDDR5X configuration offers substantially less memory bandwidth than HBM-based competitors, which remains the main bottleneck for large model inference.
Jaguar Shores, meanwhile, has been confirmed by Intel as a product, though technical details about it remain sparse. Intel products chief Michelle Johnston Holthaus stated during the company’s Q1 2025 earnings call that Jaguar Shores remains on the AI roadmap despite the cancellation of its predecessor, Falcon Shores, and described it as a rack-scale design incorporating silicon photonics interconnects. Intel has also confirmed, via a slide shown at its AI Summit, that Jaguar Shores will carry the Gaudi brand and use HBM4 memory from SK hynix.
Should it launch, Jaguar Shores would be Intel’s first return to HBM-based AI acceleration since Ponte Vecchio, but specifications remain unconfirmed, and we’re very unlikely to see a release until 2027 at the earliest. That would put it up against Nvidia’s Vera Rubin successors and AMD’s Instinct MI500 series — and whether it can be competitive by then depends heavily on software maturity, an area where Intel’s track record in AI acceleration has been consistently weak.
Process nodes and packaging
Intel 4, which debuted with Meteor Lake, was Intel’s first EUV-enabled manufacturing node, claiming 21.5% higher frequencies at the same power as Intel 7, or 40% lower power consumption at the same frequency, alongside a 2x transistor density improvement for high-performance libraries. Intel 4 also introduced second-generation Contact-over-Active-Gate, enhanced copper interconnects with cobalt cladding for better performance and electromigration resistance, and doubled MIM capacitance density to reduce voltage droop.
Production ran at Intel’s D1 facility in Hillsboro, Oregon, with Fab 34 in Ireland coming online for Intel 4 volume production in late 2023. Notably, only Meteor Lake’s compute tile used Intel 4; the graphics, SoC, and I/O tiles were sourced from TSMC and older Intel nodes, reflecting the limited scope of Intel 4 as a chiplet-specific node.
Intel 3 followed as an 18% performance-per-watt improvement over Intel 4, with broader EUV usage, improved transistor cells, and both I/O and high-density cell libraries suited for server workloads. Sierra Forest, which launched in June 2024 as the first E-core Xeon 6, was its first flagship product, followed by Granite Rapids with P-cores in September 2024. Unlike Intel 4, Intel 3 was designed as a more general-purpose node from the start, underpinning Intel’s server ramp and serving as the base die for Clearwater Forest’s heterogeneous packaging.
Intel 20A, meanwhile, was the planned introduction point for RibbonFET and PowerVia in production, and Intel confirmed it entered production readiness in 2024. But Intel also confirmed the decision to shift Arrow Lake consumer parts away from Intel 20A to external nodes. The only logical explanation for this is that Intel concentrated its 20A engineering on proving the key technologies it needed for 18A rather than committing a high-volume product line to an intermediate node.
|
Node |
Technology |
Products |
Status |
|
Intel 4 |
EUV; Foveros 3D client baseline |
Meteor Lake |
Production |
|
Intel 3 |
EUV server node |
Sierra Forest, Granite Rapids |
Production |
|
Intel 20A |
RibbonFET + PowerVia |
Internal; Arrow Lake moved to TSMC |
Canceled |
|
Intel 18A |
RibbonFET + PowerVia at volume; backside power delivery |
Panther Lake, Clearwater Forest |
Volume production |
|
Intel 18A-P/PT |
Performance extension |
TBA |
Volume production |
|
Intel 14A |
High-NA EUV; PowerDirect |
TBA |
Customer-dependent |
Every product on Intel’s 2026-2028 roadmap runs on Intel 18A, the company’s first node to combine RibbonFET gate-all-around transistors with PowerVia backside power delivery. RibbonFET wraps the gate entirely around the channel on all four sides, improving electrostatic control and reducing leakage compared to the FinFET structures Intel used through its 10th Gen era. PowerVia routes power through the back of the silicon wafer, freeing front-side routing resources for signal interconnects. 18A entered high-volume manufacturing in October, but yields remain below profitable levels and, per CFO David Zinsner, will not reach desired cost thresholds until the end of 2026 at the earliest.
Intel 14A, which uses High-NA EUV — which Intel is the first to deploy — remains contingent on securing a major external foundry customer. The good news is that Intel has said it has two prospective customers in the works following early PDK access, and CEO Lip-Bu Tan reckons that firm supplier decisions will be made in the “second half of this year… extending into the first half of 2027.” A lot is riding on these prospective customers, with Intel having publicly discussed the possibility of slowing or cancelling 14A and subsequent nodes if external foundry revenue does not materialize at scale. Without it, the capital expenditure required to develop and ramp leading-edge nodes past 18A will become extremely difficult to justify.
The future of Intel
Whether Clearwater Forest’s 2026 launch materializes will be a solid indication of whether 18A performs at the scale Intel has projected, while Panther Lake’s rollout through laptop OEMs will test whether 18A volume manufacturing is genuinely ramping up or still constrained to early production quantities.
Meanwhile, any announcement from Intel Foundry on an external customer committing to 18A or beginning 14A engagement could substantially change the economics of Intel’s roadmap.
During the 10nm era, Intel’s manufacturing problems were visible and protracted over several years. Today’s timeline is more compressed, and Intel’s public milestones — Panther Lake and Clearwater Forest shipping on 18A in close succession — are specific enough to hold the company to account.
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